Design Engineer

Company Details

We're a fast growing semiconductor research and IP development company. We provide innovative, word-leading software and hardware that enables ultra-high performance and error resilient signal processing to accelerate future generations of wireless communications.


This is a unique opportunity to join a fast-growing company on the South coast, with international reach. We are looking for a highly capable, enthusiastic and personable individual to join our team. We are specifically seeking an Design Engineer with a broad skillset of relevant industry experience, to contribute to the development of IP, system and board solutions within our product portfolio. This is a hands-on role, which will play an important part in the growth of AccelerComm and its product portfolio.

Key Responsibilities

  • Contribute and eventually take responsibility for the successful and timely delivery of portions of projects by providing excellent technical capabilities and skills, in RTL design, implementation and verification
  • Collaborate with colleagues on the micro-architecture, design, development, verification, SoC physical implementation, FPGA implementation and documentation of our IP
  • Develop RTL implementations of our IP, using SystemVerilog
  • Develop test benches for RTL implementations of electronics systems for communication, using SystemVerilog, SystemC and DPI
  • Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques and be able to offer improvements to improve efficiency and quality of design and product

Skills Knowledge and Expertise

  • Degree qualified (or equivalent)
  • Good experience in delivering portions of digital designs in the ASIC and FPGA industry
  • Timing and hardware resource optimisation for high throughput data or signal processing applications
  • Experience of EDA tools for simulation and synthesis (eg. QuestaSim, Synopsys VCS and Verdi, Intel Quartus, Xilinx Vivado, Synopsys DC Ultra or NXT, Cadence Genus)
  • Good understanding of STA and EDA tool and digital design optimisations, to meet timing constraints on both ASIC and FPGA
  • Good knowledge of an RTL language (VHDL, Verilog, SystemVerilog)
  • Good knowledge of a scripting language (e.g. Bash, Perl, Python, TCL)
  • Technical documentation writing – design specifications, user guides, verification plans


  • Knowledge of communications signal processing algorithms (ideally error correction, equalisation, channel estimation, beamforming or another baseband component)
  • Appreciation of mobile communications systems
  • Experience of logic equivalency checking tools – Formality/Conformal
  • Understanding of version control systems such as Git, Perforce etc. to enable advanced version control techniques
  • Understanding of AXI interfacing (AXI MM, AXILite and AXI Streaming) and understanding of RTL implementation of these interfaces
  • Understanding of telecoms and/or semiconductor industries
  • Experience using SystemC design modelling and integration

Tagged as: python, scripting language, communications signal processing algorithms

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