Wireless Baseband Systems Design

Company Details


Job Description:

We are looking for strongly motivated candidates who have hands-on experience in SystemVerilog programming for wireless baseband design. The work involves design and development of baseband modules in SystemVerilog for GigaMesh and SpaceNet.

Mandatory Skills:

  • Experience in abstraction and algorithmic thinking.
  • Ninja of debugging and logical reasoning.
  • Strong knowledge and experience in SystemVerilog programming for implemention (not just verification).
  • Expert in digital signal processing techniques such as fast Fourier transform, and good handle on linear algebra and complex algebra.

Preferred Skills:

  • Hands-on experience in Python.
  • Prior experience in realization of baseband for wireless systems such as OFDM.
  • Experience in automated testing.
  • Experience in Xilinx FPGA and Vivado tools.


  • Freshers and experienced candidates are both welcome. Based on your qualifications, you could join as a junior, senior or lead engineer.

If you think you fit the description above, what are you waiting for? Send us your application right away!


Tagged as: python, ofdm, automated testing, xilinx fpga, vivado, systemverilog, fourier transform, linear/complex algebra

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