End-to-End Space Transportation and In-Space Services
The Firmware Engineer will be responsible for integration and test of firmware found on all of Firefly’s Avionics and Avionics sub-systems. This role is part of a growing firmware team and is an opportunity to learn and grow. The candidate will have the opportunity to test, optimize, and maintain FPGA firmware systems on multiple platforms related to both traditional launch vehicles, and spacecraft.
This is a fast-pace role requiring the ability to adapt and be flexible including understanding PCB assemblies’ function in the overall system and build the firmware configurations to meet the requirements. A successful candidate will be a team player able to support the firmware and FPGA performance from development through launch.
- Integrating and testing FPGA firmware targeting Xilinx, Intel, and Microsemi FPGA devices.
- Creating test benches and regression testing for simulating FPGA designs.
- Testing designs on target hardware to ensure it performs as per project requirements.
- Providing reports for testing results and coordinating with other FPGA designers.
- Diagnosing and debugging FPGA interfaces on a variety of products.
- Collaborating with a firmware design team in an Agile project management workflow.
- Participate in the manufacturing test process starting with requirements and ending with firmware used in a station to verify functionality.
- Development of C# and Python code for troubleshooting systems
- Implement design blocks using VHDL
- Bring-up and validate ASICs and FPGAs in the lab
- BS in Electrical Engineering or Computer Science
- Hands-on experience with embedded systems in a lab-based environment
- Solid digital design fundamentals
- Ability to work as a test lead coordinating tasks with subject matter experts
- Experience with source control (Git)
- Minimum 2 years of FPGA/SoC based software development experience
- Proficiency in embedded C/C++ programming
- Design experience with CAN, Serial, Ethernet communication protocols
- Understanding of data path pipelines, state machines, and arithmetic operations
- Exposure to static timing analysis
- Experience in Verilog, System Verilog, and/or VHDL (Vivado)
- ASIC/FPGA/SoC system integration experience
- Experience with high reliability design and implementations
- Software design and development skills
- Comfortable with scripts and command line (csh/bash, Perl, Python etc.)
- Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)
- Ability to work in a dynamic environment with changing needs and requirements
- Team-player, can-do attitude, and ability to work well in a group environment while still contributing on an individual basis
- Enjoys being challenged and learning new skills