Adaptive artificial intelligence for the edge.
We are looking for an experienced engineer to take responsibility for the physical implementation flow of our digital IPs and supervise that they match the requirements in terms of power, timing and area.. In this role, you will be in charge of:
- Provide feedback to the engineering team working on HDL and support them until all design metrics are satisfied.
- Implementing and supervising the physical implementation flow
- Be in charge for the final signoff before tape-outs
- Supervise the manufacturing flow of prototypes
- Interact with foundries engineers
- Identify and manage all digital IPs for Synthara’s ASICs
Synthara is looking for an experienced engineer with previous experience with chip tape-outs and team management. We seek a reliable figure whose work is characterized by the highest quality standard, with a long-term vision and career expectations.
- Experience in digital design sign-off
- Experience with Cadence tools
- Expertise in power optimization and timing closure
- Expertise in power estimation techniques
- Expertise in 28nm (or smaller) technologies
- A methodical, high quality and reliable approach to work